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Job: IRC93628


Job TitleStaff Software Engineer / Simulation - Compiler*
LocationSan Jose, CA, US
Organization NameInteractive Design Tools
Detailed Description
Xilinx Inc., the world’s leading provider of All Programmable FPGAs, SoCs and 3D ICs, is looking for a talented, self-driven and motivated software engineer to be part of the Xilinx Vivado Simulator team. The Vivado Simulator is a key component of Xilinx' Vivado Software Suite, a revolutionary IP and system-centric design environment built to accelerate the design and verification of 'All Programmable' FPGAs, SoCs and 3D ICs. The Vivado Software suite, which includes the Vivado Simulator, is a set of pure software applications running on a desktop OS (Linux/Windows). The Vivado Simulator is a full language native compiled code Single Kernel Mixed HDL (Hardware Description Languages: Verilog, VHDL, SystemVerilog etc.) simulator built ground up in Xilinx using cutting edge software (C++, Verific parsers, STL, BOOST etc.) and compiler technologies (such as LLVM compiler framework) and is used by thousands of Xilinx customers to simulate the logic designs targeted for Xilinx hardware.

As a member of this small, high-performance team, the selected candidate will be responsible for supporting new language features (SystemVerilog, VHDL 2008 etc.) in the simulator's object code-generating HDL compilers, building compiler optimizations at various phases of the compilation -- the AST (Abstract syntax Tree), IR (Intermediate Representation), and Run Time model. The candidate will also be responsible for improving the quality and performance of various simulator components. As the simulator is constantly expanding with new features, a large proportion of every team member's effort is spent developing new software. Additionally, the Vivado Simulator team provides a start-up like environment allowing each of its members immense opportunity to learn and grow capabilities.
Job Requirements


  • BS in Mathematics, Physics, CS, EE or CE
  • 10+ years of software development experience
  • Proficiency in C/C++ programming
  • Experience in developing and supporting large-scale software, including understanding usage model, writing functional specification, code design, implementation, testing, documentation, and customer support
  • Strong background in data structures and algorithms
  • Knowledge of compiler infrastructure, code generation and compiler optimizations
  • Excellent communication skills


  • MS or PhD with specialization in compilers
  • Knowledge of Verilog, VHDL, or SystemVerilog
  • Knowledge of Verific parsers
  • Experience with GCC or LLVM compilers development
  • Experience in adding support for major constructs of Verilog, VHDL, or SystemVerilog to a HDL simulator
Additional Details
Applicants are treated throughout the employment process without regard to race, color, religion, national origin, citizenship, age, sex, marital status, ancestry, physical or mental disability, veteran status or sexual orientation. The information requested here is not gathered for employment decisions. It is used only for compliance with Federal laws. Your responses are strictly voluntary, and any information provided will remain confidential. If you choose not to "self-identify", you will not be subject to any adverse treatment.


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