|Job Title||Networking and Communications Systems Intern|
|Location||San Jose, CA, US|
|Organization Name||Advanced Communications, FPGA Development and Silicon Technology|
This internship project is on solving wireline or wireless infrastructure problems with Xilinx FPGAs. This intern will work with a technical mentor to implement novel algorithms on Xilinx FPGAs in the areas of arbitration, queuing, or adaptive non-linear filtering. Analysis of the implementation in terms of performance, FPGA resource usage, power consumption, and recommendations for future work will be part of a technical report due at the end of the internship.
|This intern position is geared towrads students currently in a Master's or PhD program in Electrical Engineering or Computer Science. The successful candidate will have logic design, verification, synthesis, and place-and-route experience with Xilinx FPGAs using either ISE or Vivado. Fundamentals in digital signal processing (DSP) or networking is a must. Good presentation, teamwork, and interpersonal communication skills are required.|
Xilinx’s definition an intern is defined as a full-time student who is currently enrolled in an undergraduate or postgraduate degree program in an accredited college or university.
Xilinx’s definition a college co-op student is a full-time student currently enrolled in a cooperative education program leading to an undergraduate or postgraduate degree at an accredited college or university.
|Applicants are treated throughout the employment process without regard to race, color, religion, national origin, citizenship, age, sex, marital status, ancestry, physical or mental disability, veteran status or sexual orientation. The information requested here is not gathered for employment decisions. It is used only for compliance with Federal laws. Your responses are strictly voluntary, and any information provided will remain confidential. If you choose not to "self-identify", you will not be subject to any adverse treatment.|
|* Vacancy Type||Intern|