|Job Title||Staff ASIC Verification Engineer|
|Location||San Jose, CA, US|
Work as a senior ASIC verification engineer building the next generation programmable SOCs. Typical candidate will work closely with senior engineers in solving modern verification challenges using the latest tools and methodologies.
Technologies that you will work with include:
- System verilog, UVM/OVM, C/C++, ARM assembly
- USB, GigE, SDIO, DDR, ARM CPU, ARM coresight components
- EDA tools covering simulation, formal, and Verification IPs
- You must possess a minimum of a Bachelor (Masters preferred) of Science degree in Electrical Engineering, Computer Engineering or a related field, and work experience of 6+ years in verifying complex digital designs.
- Working knowledge of C/C++ and Assembly programming languages
- Working knowledge of UNIX and scripting languages (Perl, Python, PHP)
- Excellent documentation and communication skills
- Knowledge of Verilog, system Verilog is a must
- Experience with FPGAs is a plus
- Strong desire to learn and undertake new challenges
|Applicants are treated throughout the employment process without regard to race, color, religion, national origin, citizenship, age, sex, marital status, ancestry, physical or mental disability, veteran status or sexual orientation. The information requested here is not gathered for employment decisions. It is used only for compliance with Federal laws. Your responses are strictly voluntary, and any information provided will remain confidential. If you choose not to "self-identify", you will not be subject to any adverse treatment.|