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Job: IRC95207


Job TitleAnalag Design Engineer
LocationSan Jose, CA, US
Organization NameAnalog IC Design
Detailed Description

1.       HPIO LVDS Driver and Pre-Driver Design

a.       Sub-Project Given/Start Date:

                                                               i.      Sub-Project Start on receipt of Order

                                                             ii.      Product Definition Document for the relevant section

                                                            iii.      Functional Specification if applicable

                                                           iv.      Design files and database from the following files: ATTRMEM, VEAM, YAML, RTL

b.      Deliverables:

                                                               i.      Evaluate the driver implementation in Fuji

                                                             ii.      Review the specification for LVDS Driver Design for HPIO

                                                            iii.      Propose new implementation if needed in Olympus

                                                           iv.      Do schematic Capture and present to the team in a design review the design methodology

                                                             v.      Work with layout to complete design and do post layout simulations.

                                                           vi.      Provide documentation for the design and the approach for the same.

                                                          vii.      Provide support for completing hand-offs to the RTL and integration teams for helping select the values for the attributes of the design.

                                                        viii.      Design any LVDS logic associated with LVDS Driver.

                                                           ix.      Document and review simulation and verification plans

                                                             x.      Verify spice simulations vs RTL and document the results.

c.       Acceptance Criteria:

                                                               i.      Design simulated and extracted to specifications as outlined in the PDD.

d.      LVDS Driver Sub-Project Complete Date:

                                                               i.       12 Weeks after start.

Job Requirements

Requires design experience in deep sub-micron IO design, layout and test. The project involves Design, Simulation, Characterization and documentation of the assigned sub-blocks of the HPIO in 20nm TSMC process. Work shall include reviewing the product requirements and the design parameters database. Evaluating and familiarizing self with the design environment the IO group uses and then completing the tasks set out in sections below.

Additional Details
Xilinx Inc. is an Equal Employment Opportunity, Affirmative Action Employer that complies with all US federal and state laws regarding non-discrimination.THIS IS A TEMPORARY JOB VACANCY


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